The present invention relates generally to semiconductor fabrication and, more particularly, to a chamber liner for use in semiconductor process chambers.
In semiconductor fabrication, plasma etching is commonly used to etch conductive and dielectric materials. One of the problems with plasma etching is that a film builds up on the wall of the process chamber over the course of time as multiple wafers are processed in the chamber. This film build-up may cause problems in either of two ways. First, the film may flake off the wall and introduce particulates into the chamber. As feature sizes in integrated circuit devices continue to decrease, the degree to which particulates can be tolerated during processing is rapidly declining. Therefore, it is becoming increasingly more important to avoid particulates during processing. Second, the film may alter the RF ground path and thereby affect the results obtained on the wafer. The occurrence of either of these conditions is undesirable and signals the need to subject the process chamber to a wet cleaning operation in which the wall of the chamber is physically scrubbed to remove the film build-up.
Wet cleaning of process chambers is not preferred in commercial semiconductor fabrication because it requires that a process module be taken off-line and thereby reduces throughput. In an effort to avoid the need for wet cleaning, some process chambers have been provided with a liner for protecting the wall of the chamber. The use of a liner is advantageous because the liner can be easily replaced with minimal downtime when film build-up occurs thereon.
Cylindrical liners currently used in process chambers, however, suffer from at least two major drawbacks. The first drawback is that such a liner, the entirety of which is located in a vacuum, lacks an adequate thermal connection because thermal transfer in a vacuum is poor. As a result, the temperature of the liner fluctuates dramatically when the RF power is cycled on and off. This temperature fluctuation causes undesirable variations in the processing of the wafer. The second drawback is that it is difficult to make an electrical connection to the liner in the vacuum that provides a satisfactory RF ground return path. The materials commonly used for this purpose, e.g., stainless steel screws, copper strapping, and beryllium copper fingers, produce contaminants on the wafer because they are not compatible with the reactive materials within the chamber, i.e., the plasma chemistry.
In view of the foregoing, there is a need for a chamber liner for a semiconductor process chamber that provides thermal stability, an adequate RF ground return path, and serviceability with minimal downtime.